tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 85

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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RA000
4.3.5 External interrupt 5
more are recognized as signals.
nized as signals.
External interrupt 5 detects the falling edge of the
In NORMAL1/2 or IDLE1/2 mode, pulses of less than 1/fcgck are removed as noise and pulses of 2/fcgck or
In SLOW/SLEEP mode, pulses of less than 4/fs are removed as noise and pulses of 8/fs or more are recog-
Signal after noise removal
level is detected twice consecutively, the signal is recognized as a signal.
interrupts are unavailable. When operation returns to NORMAL1/2, IDLE1/2, SLOW1/2 or SLEEP1
mode, sampling operation restarts.
In SLOW1/2 or SLEEP1 mode, a signal is sampled by the low frequency clock divided by 4. If the same
In IDLE0, SLEEP0 or STOP mode, the noise canceller sampling operation is stopped and an external
Note 1: When noise is input consecutively during sampling external interrupt pins, the noise cancel function
Note 2: When an external interrupt pin is used as an output port, the input signal to the port is fixed to "L"
Note 3: Interrupt requests may be generated during transition of the operation mode. Before changing the
does not work properly. Set EINTCRx<INTxNC> according to the cycle of externally input noise.
when the mode is switched to the output mode, and thus an interrupt request occurs. To use the pin
as an output port, clear the corresponding interrupt enable register to "0" to disable the generation of
interrupt.
operation mode, clear the corresponding interrupt enable register to "0" to disable the generation of
interrupt. When the operation mode is changed from NORMAL1/2 or IDLE1/2 to SLOW1/2 or
SLEEP1, wait 12/fs [s] after the operation mode is changed and clear the interrupt latch. And when
the operation mode is changed from SLOW1/2 or SLEEP1 to NORMAL1/2 or IDLE1/2, wait 2/
fcgck+3/fspl [s] after the operation mode is changed and clear the interrupt latch.
INT4 pin
Table 4-5 Noise Canceller Sampling Lock
EINTCR4<INT4NC>
Figure 4-7 Noise Cancel Operation
00
01
10
11
Page 71
Sampling interval
INT5
Signal
fcgck/2
fcgck/2
fcgck/2
fcgck
pin and generates interrupt request signals.
2
3
4
Noise
TMP89FM42

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