tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 237

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
16.10Received Data Noise Rejection
Table 16-8 Received Data Noise Rejection Time
RXDNC
RT clock
RXD0 pin
Internal received
data
Shift register
shown in Table 16-8.
00
01
10
11
When noise rejection is enabled at UART0CR2<RXDNC>, the time of pulses to be regarded as signals is as
Note 1: The transfer base clock frequency is the clock frequency selected at UARTCR1<BRG>.
2 u (UART0DR+1)/(Transfer base clock frequency)
4 u (UART0DR+1)/(Transfer base clock frequency)
Noise
(UART0DR+1)/(Transfer base clock frequency)
Noise is removed
Noise rejection time [s]
No noise rejection
Figure 16-9 Received Data Noise Rejection
A falling edge
is detected
15 14 13 12 11 10 9
Start bit
Start bit
When the noise rejection
circuit is used
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because the start bit is 0
Receiving continues
8
7
6
5
2 u (UART0DR+1)/(Transfer base clock frequency)
4 u (UART0DR+1)/(Transfer base clock frequency)
8 u (UART0DR+1)/(Transfer base clock frequency)
4
Time of pulses to be regarded as signals
3
2
1 0 15 14 13 12 11 10 9
Bit 0
Bit 0
-
The received data is taken into
the shift register
8
7
TMP89FM42
6
5
Bit 0
4 3