tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 41

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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RA001
Table 2-3 Operation Modes and Conditions
Single clock
2.3.6 Operation Mode Control
Dual clock
2.3.6.1
Operation mode
RESET
NORMAL1
IDLE1
IDLE0
STOP
NORMAL2
IDLE2
SLOW2
SLOW1
SLEEP1
SLEEP0
STOP
nals.
STOP mode
(1)
(2)
The STOP mode is controlled by system control register 1 (SYSCR1) and the STOP mode release sig-
states are maintained:
reset by the
released, the warm-up starts. After the warm-up is completed, the NORMAL1 mode becomes active.
Start the STOP mode
The STOP mode is started by setting SYSCR1<STOP> to "1". In the STOP mode, the following
Release the STOP mode
The STOP mode is released by the following STOP mode release signals. It is also released by a
1. Both the high-frequency and low-frequency clock oscillation circuits stop oscillation and all
2. The data memory, the registers and the program status word are all held in the states in
3. The prescaler and the divider of the timing generator are cleared to "0".
4. The program counter holds the address of the instruction 2 ahead of the instruction (e.g.,
1. Release by the STOP pin
Oscillation
Oscillation
High-fre-
quency
internal operations are stopped.
effect before STOP mode was started. The port output latch is determined by the value of
SYSCR1<OUTEN>.
[SET (SYSCR1).7]) which started the STOP mode.
Stop
Stop
Oscillation circuit
RESET
Oscillation
pin, a power-on reset and a reset by the voltage detection circuits. When a reset is
Low-fre-
quency
Stop
Stop
Operate with
Operate with
Operate with
the high fre-
the low fre-
the low fre-
CPU core
Operate
quency
quency
quency
Reset
Stop
Stop
Stop
Page 27
Operate with
Operate with
Operate with
the high/low
the low fre-
the low fre-
Watchdog
frequency
Operate
quency
quency
Reset
timer
Stop
Stop
Stop
Time base
Operate
Operate
Reset
timer
Stop
Stop
Other periph-
eral circuits
Operate
Operate
Reset
Stop
Stop
Machine cycle time
TMP89FM42
1 / fcgck [s]
1 / fcgck [s]
4/ fs [s]
Å|
Å|

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