tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 195

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA002
14.4.3.2 Operations
PWM0 pin output
(TFF0=“1”)
PWM0 pin output
(TFF0=“0”)
INTT00 interrupt
request
"L" level as the initial state of the
initial state of the
timer is stopped, the value of T00MOD<TFF0> is output to the
output levels of the
put can be output to
clock. When a match between the lower 7 bits of the up counter value and the value set to
T00PWM<PWMDUTY> is detected, the output of the
"0", the
changes from the "H" to "L" level.
added at the 2 u n-th match detection (n=1, 2, 3...). In other words, the
timing of T00PWM<PWMDUTY>+1. When T00MOD<TFF0> is "0", the period of the "L" level
becomes longer than the value set to T00<PWMDUTY> by 1 source clock. When T00MOD<TFF0> is
"1", the period of the "H" level becomes longer than the value set to T00PWM<PWMDUTY> by 1 source
clock. This function allows two cycles of output pulses to be handled with a resolution nearly equivalent
to 8 bits.
Timer start
Set the initial state of the
And by setting "1" to T001CR<OUTAND> bit, a logical product (AND) pulse of TC00 and TC01’s out-
Setting T001CR<T00RUN> to "1" allows the up counter to increment based on the selected source
If T00PWM<PWMAD> is "1", an additional pulse that corresponds to 1 count of the source clock is
No additional pulse is inserted when T00PWM<PWMAD> is "0".
Table 14-6 List of Output Levels of
(Duty pulse
T00PWM
width)
(cycle width)
128 counts
PWM0
Cycle 1
TFF0
0
1
pin changes from the "L" to "H" level. When T00MOD<TFF0> is "1", the
PWM0
PWM0
(Duty pulse
PWM0
T00PWM
Figure 14-5
Before the start
width)
(cycle width)
128 counts
(initial state)
of operation
pin. If the
Cycle 2
pin.
pin. By using this function, the remote-control waveform can be created eaily.
L
H
PWM0
Additional
pulse
PWM0
PWM0
pin at T00MOD<TFF0>. Setting T00MOD<TFF0> to "0" selects the
(after the addi-
<PWMDUTY>
PWM0
Page 181
tional pulse)
Cycle 3
T00PWM
matched
pin. Setting T00MOD<TFF0> to "1" selects the "H" level as the
pin is set as the function output pin in the port setting while the
H
PWM0
L
PWM0
Pulse Output
pin output level
Pin
Cycle 4
PWM0
Overflow
Additional
H
L
pulse
pin is reversed. When T00MOD<TFF0> is
PWM0
Cycle 5
(initial state)
PWM0
Operation
stopped
pin. Table 14-6 shows the list of
H
L
pin output is reversed at the
Cycle 6
Additional
TMP89FM42
pulse
PWM0
pin