tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 325
tmp89fm42
Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42.pdf
(408 pages)
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RA003
21.2.6 Port input control register (SPCR<PIN0, PIN1>)
"0" is effective), FSTB is automatically initialized to "0", and then the interrupt vector of the flash memory
area is read. If an interrupt occurs when the interrupt vector is assigned to the RAM area (SYSCR3<RVCTR>
= "1" is effective), FSTB is not cleared to "0", and then the interrupt vector of the RAM area is read. In this
case, the RAM area should be designated as a referential address of interrupt vector. If the flash memory area is
designated as a referential address of interrupt vector, a flash standby reset occurs after an interrupt is gener-
ated.
mode, are physically fixed after a reset is released. This is designed to prevent a penetration current from flow-
ing through unused ports (port inputs and functional peripheral inputs, which are also used as ports, are dis-
abled). To access the flash memory using the RAM loader mode and a method other than the UART, therefore,
port inputs must be set to "enable". To enable the SCLK0 port input, set SPCR<PIN0> to "1". To enable port
inputs other than RXD0, TXD0 and SCLK0 port inputs, set SPCR<PIN1> to "1".
If an interrupt occurs when the interrupt vector is assigned to the flash memory area (SYSCR3<RVCTR> =
In serial PROM mode, the input levels of all ports, except the ports RXD0 and TXD0 used in serial PROM
In MCU mode, the SPCR register does not function.
Page 311
TMP89FM42
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