tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 42

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.3 System clock controller
2. CPU Core
RA001
STOP pin
XOUT pin
NORMAL mode
Note: When the STOP mode is released, the warm-up counter source clock automatically changes to the clock that generated the
PINT5:
SINT5:
xxxxxxxxxxxxx
xxxxxxxxxxxxx
xxxxxxxxxxxxx
xxxxxxxxxxxxx
main system clock when the STOP mode was started, regardless of WUCCR<WUCSEL>.
Example: Starting the STOP mode from the SLOW mode with an INT5 interrupt
Note: During the STOP period (from the start of the STOP mode to the end of the warm-up), due to
TEST
JRS
LD
LD
LD
DI
SET
RETI
(Warm-up time at release of the STOP mode is about 450ms at fs=32.768 KHz.)
2. Release by key-on wakeup
3. Release by the voltage detection circuits
1. Release by the
changes in the external interrupt pin signal, interrupt latches may be set to "1" and interrupts may
be accepted immediately after the STOP mode is released. Before starting the STOP mode,
therefore, disable interrupts. Also, before enabling interrupts after STOP mode is released, clear
unnecessary interrupt latches.
(For details of VDCR2, refer to the section of voltage detection circuits.)
edge-sensitive release mode, either of which can be selected at SYSCR1<RELM>.
Release the
To release the STOP mode by using the STOP pin, set VDCR2<VDSS> to "00" or "10".
The STOP mode release by the STOP pin includes the level-sensitive release mode and the
The
Confirm by program that
the STOP pin input is low
and start the STOP mode.
(P0PRD).5
F, SINT5
(SYSCR1), 0x40
(WUCCR), 0x03
(WUCDR),0xE8
(SYSCR1).7
- Level-sensitive release mode
Note:
the long term battery backup.
put is high, the STOP mode does not start. Thus, to start the STOP mode in the level-
sensitive release mode, it is necessary for the program to first confirm that the
input is low.
STOP
The STOP mode is released by setting the
Setting SYSCR1<RELM> to "1" selects the level-sensitive release mode.
This mode is used for the capacitor backup when the main power supply is cut off and
Even if an instruction for starting the STOP mode is executed while the
This can be confirmed by testing the port by the software or using interrupts
STOP
When the STOP mode is released, the warm-up counter source clock automatically changes
to the clock that generated the main system clock when the STOP mode was started, regard-
less of WUCCR<WUCSEL>.
pin is also used as the P11 port and the
STOP
mode
STOP
mode by using the STOP pin.
pin
Page 28
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
V IH
The STOP mode is released by the hardware.
; To reject noise, the STOP mode does not start
; if the
; Sets up the level-sensitive release mode
; WUCCR<WUCDIV> = 00 (No division) (Note)
;
;
; IMF = 0
; Starts the STOP mode
Sets the warm-up time
450 ms/1.953 ms = 230.4 o round up to 0xE8
Always released if the
STOP pin input is high.
Warm-up
STOP
pin input is high.
STOP
INT5
pin high.
(external interrupt input 5) pin.
NORMAL mode
TMP89FM42
STOP
STOP
pin in-
pin