tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 190

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14. 8-bit Timer Counter (TC0)
RA002
Table 14-5 8-bit Timer Mode Resolution and Maximum Time Setting
T00MOD
<TCK0>
000
001
010
011
100
101
110
111
less of the T00MOD<DBE0> setting.
SYSCR1<DV9CK>
(Example)
When a read instruction is executed on T00REG, the last value written into T00REG is read out, regard-
fcgck/2
fcgck/2
NORMAL1/2 or IDLE1/2 mode
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck
= "0"
11
10
8
6
4
2
Operate TC00 in the 8-bit timer mode with the operation clock of fcgck/2
(fcgck = 10 MHz)
LD
DI
SET
EI
LD
LD
SET
cuted using a new set value after the up counter overflows. Therefore, the interrupt request
interval may be longer than the selected time. If the value set to T00REG is equal to the up
counter value, the match detection is executed immediately after data is written into T00REG.
Therefore, the interrupt request interval may not be an integral multiple of the source clock
(Figure 14-3). If these are problems, enable the double buffer.
immediately stored in T00REG.
If the value set to T00REG is smaller than the up counter value, the match detection is exe-
When a write instruction is executed on T00REG while the timer is stopped, the set value is
Source clock [Hz]
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck/2
fcgck
= "1"
fs/2
fs/2
(POFFCR0),0x10
(EIRH).4
(T00MOD),0xE8
(T00REG),0xA0
(T001CR).0
4
3
8
6
4
2
SLEEP1 mode
SLOW1/2 or
fs/2
fs/2
fs/2
Page 176
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4
3
2
; Sets TC001EN to "1"
; Sets the interrupt master enable flag to "disable"
; Sets the INTTC00 interrupt enable register to "1"
; Sets the interrupt master enable flag to "enable"
; Selects the 8-bit timer mode and fcgck/2
; Sets the timer register (64Ps / (2
; Starts TC00
fcgck=10MHz
204.8Ps
102.4Ps
25.6Ps
400ns
200ns
100ns
6.4Ps
1.6Ps
Resolution
fs=32.768KHz
488.2Ps
244.1Ps
122.1Ps
2
[Hz] and generate interrupts at 64 Ps intervals
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2
/fcgck) = 0xA0)
fcgck=10MHz
2
52.2ms
26.1ms
25.5Ps
6.5ms
1.6ms
408Ps
102Ps
51Ps
Maximum time setting
fs=32.768KHz
TMP89FM42
124.5ms
62.3ms
31.1ms
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