tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 25

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
System control status register 4
Flash memory control register 1
(0x0FDF)
(0x0FD0)
SYSSR4
FLSCR1
2.2.1.2
Note: Bits 7 to 3 of SYSSR4 are read as "0".
Note: The flash memory control register 1 has a double-buffer structure comprised of the register FLSCR1 and a shift register.
TRANS_RAM:
Writing "0xD5" to the register FLSCR2 allows a register setting to be reflected and take effect in the shift register. This
means that a register setting value does not take effect until "0xD5" is written to the register FLSCR2. The value of the shift
register can be checked by reading the register FLSCRM.
RAREAS
Example: Program transfer (Transfer the program saved in the data area to the RAM.)
RVCTRS
BAREA
Read/Write
Read/Write
Bit Symbol
Bit Symbol
After reset
After reset
0x1000 to 0x17FF in the data area. The BOOTROM can be easily written into the Flash by using the Ap-
plication Programming Interface (API) integrated in the BOOTROM.
BOOTROM
The BOOTROM is not mapped in the code area or the data area after reset release.
Note 1: When the BOOTROM is not mapped in the code area, an instruction is fetched from the Flash or an
Note 2: Only the first 2 Kbytes of the BOOTROM are mapped in the memory map, except in the serial PROM
Setting FLSMD<BAREA> to "1" maps the BOOTROM to 0x1000 to 0x17FF in the code area and to
LD
LD
LD
LD
LD
INC
INC
DEC
JRS
SWI instruction is fetched, depending on the capacity of the internal Flash.
mode.
Status of mapping of the RAM in the
code area
Status of mapping of the vector
address in the area
Specifies mapping of the
BOOTROM in the code and data
areas
R
7
0
7
0
-
HL, TRANSFER_START_ADDRESS
DE, PROGRAM_START_ADDRESS
BC, BYTE_OF_PROGRAM
A, (DE)
(HL), A
HL
DE
BC
F, TRANS_RAM
(FLSMD)
R/W
R
6
0
6
1
-
R
5
0
5
0
-
0 :
1 :
0 :
1 :
Page 11
0 :
1 :
The enabled SYSCR3<RAREA> data is "0".
The enabled SYSCR3<RAREA> data is "1".
The enabled SYSCR3<RVCTR> data is "0".
The enabled SYSCR3<RVCTR> data is "1".
The BOOTROM is not mapped to 0x1000 to 0x17FF in the code area and
to 0x1000 to 0x17FF in the data area.
The BOOTROM is mapped to 0x1000 to 0x17FF in the code area and to
0x1000 to 0x17FF in the data area.
BAREA
; Destination RAM address
; Source ROM address
; Number of bytes of the program to be executed -1
; Reading the program to be transferred
; Writing the program to be transferred
; Destination address increment
; Source address increment
; Have all the programs been transferred?
R/W
R
4
0
4
0
-
R
3
0
3
0
-
(FAREA)
R/W
RVCTRS
R
2
0
2
0
RAREAS
1
R
0
1
0
(ROMSEL)
R/W
TMP89FM42
(RSTDIS)
R
0
0
0
0