tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 162

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

13.4 Timer Function
13. 16-bit Timer Counter (TCA)
RA001
13.4 Timer Function
13.4.1 Timer mode
Table 13-3 Timer Mode Resolution and Maximum Time Setting
<TA0CK>
TA0MOD
width measurement and programmable pulse generate (PPG) output modes.
13.4.1.1 Setting
13.4.1.2 Operation
13.4.1.3 Auto capture
Timer counter A0 has six types of operation modes; timer, external trigger timer, event counter, window, pulse
00
01
10
11
larly at specified times.
In the timer mode, the up-counter counts up using the internal clock, and interrupts can be generated regu-
SYSCR1<DV9CK>
Select the source clock at TA0MOD<TA0CK>.
and TA0CR<TA0OVE> becomes invalid. Be sure to complete the required mode settings before starting
the timer.
source clock. When a match between the up-counter value and the value set to timer register A
(TA0DRA) is detected, an INTTA0 interrupt request is generated and the up counter is cleared to
"0000H". After being cleared, the up counter continues counting. Setting TA0CR<TA0S> to "0" during
the timer operation causes the up counter to stop counting and be cleared to "0000H".
TA0CR<TA0ACAP> to "1" (auto capture function). When TA0CR<TA0ACAP> is "1", the current con-
tents of the up counter can be read by reading TA0DRBL. TA0DRBH is loaded at the same time as
TA0DRBL is read. Therefore, when reading the captured value, be sure to read TA0DRBL and
TA0DRBH in this order. (The capture time is the timing when TA0DRBL is read.) The auto capture func-
tion can be used whether the timer is operating or stopped. When the timer is stopped, TA0DRBL is read
as "00H". TA0DRBH keeps the captured value after the timer stops, but it is cleared to "00H" when
TA0DRBL is read while the timer is stopped.
after the timer is started.
Setting the operation mode selection TA0MOD<TA0M> to "000" or "001" activates the timer mode.
Setting TA0CR<TA0S> to "1" starts the timer operation. After the timer is started, writing to TA0MOD
Setting TA0CR<TA0S> to "1" allows the 16-bit up counter to increment based on the selected internal
The latest contents of the up counter can be taken into timer register B (TA0DRB) by setting
If the timer is started with TA0CR<TA0ACAP> written to "1", the auto capture is enabled immediately
Note 1: The value set to TA0CR<TA0ACAP> cannot be changed at the same time as TA0CR<TA0S> is
NORMAL 1/2 or IDLE 1/2 mode
fcgck/2
fcgck/2
fcgck/2
fcgck/2
= "0"
10
6
2
rewritten from "1" to "0". (This setting is invalid.)
Source clock [Hz]
SYSCR1<DV9CK>
fcgck/2
fcgck/2
fcgck/2
= "1"
fs/2
3
6
2
SLEEP1 mode
SLOW1/2 or
fs/2
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3
fcgck=10MHz
102.4Ps
400ns
200ns
6.4Ps
Resolution
fs=32.768KHz
244.1us
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fcgck=10MHz
419.4ms
26.2ms
13.1ms
Maximum time setting
6.7s
fs=32.768KHz
TMP89FM42
16s
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