tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 280

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

18.3 Control
18. Serial Bus Interface (SBI)
RA001
Serial bus interface status register 2
SBI0SR2
(0x0023)
Note 1: When SBI0CR2<SBIM> is "0", no value can be written to SBI0CR2 except SBI0CR2<SBIM>. Before writing values to
Note 2: Don't change the contents of the registers, except SBI0CR2<SWRST>, when the start condition is generated, the stop
Note 3: Make sure that the port is in a high state before switching the port mode to the serial bus interface mode. Make sure that
Note 4: SBI0CR2 is a write-only register, and must not be accessed by using a read-modify-write instruction, such as a bit opera-
Note 5: After a software reset is generated, all the bits of SBI0CR2 register except SBI0CR2<SBIM> and the SBI0CR1, I2C0AR
Note 6: When the operation is switched to STOP, IDLE0 or SLOW mode, the SBI0CR2 register, except SBI0CR2<SBIM>, and the
Note 1: * : Unstable
Note 2: When SBI0CR2<SBIM> becomes "0", SBI0SR is initialized.
Note 3: After a software reset is generated, all the bits of the SBI0CR2 register except SBI0CR2<SBIM> and the SBI0CR1,
Note 4: When the operation is switched to STOP, IDLE0 or SLOW mode, the SBI0CR2 register, except SBI0CR2<SBIM>, and the
SBI0CR2, write "1" to SBI0CR2<SBIM> to activate the serial bus interface mode.
condition is generated or the data transfer is in progress. Write data to the registers before the start condition is generated
or during the period from when an interrupt request is generated for stopping the data transfer until it is released.
the bus is free before switching the serial bus interface mode to the port mode.
tion.
and SBI0SR2 registers are initialized.
SBI0CR1, I2C0AR and SBI0DBR registers are initialized.
I2C0AR and SBI0SR2 registers are initialized.
SBI0CR1, I2C0AR and SBI0DBR registers are initialized.
SWRST
Read/Write
Bit Symbol
After reset
SBIM
MST
TRX
PIN
BB
MST
TRX
AAS
AD0
LRB
PIN
BB
AL
Master/slave selection
Transmitter/receiver selection
Start/stop generation
Cancel interrupt service request
Serial bus interface operation
mode register
Software reset start bit
Master/slave selection status
monitor
Transmitter/receiver selection
status monitor
Bus status monitor
Interrupt service requests sta-
tus monitor
Arbitration lost detection monitor
Slave address match detection
monitor
"GENERAL CALL" detection
monitor
Last received bit monitor
MST
R
7
0
TRX
R
6
0
0: Slave
1: Master
0: Receiver
1: Transmitter
0: Generate the stop condition (when MST, TRX and PIN are "1")
1: Generate the start condition (when MST, TRX and PIN are "1")
0: - (Cannot clear this bit by the software)
1: Cancel interrupt service request
0: Port mode
1: Serial bus interface mode
The software reset starts by first writing "10" and next writing "01"
BB
R
5
0
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0: Slave
1: Master
0: Receiver
1: Transmitter
0: Bus free
1: Bus busy
0: Requesting interrupt service
1: Releasing interrupt service request
0: -
1: Arbitration lost detected
0: -
1: Detect slave address match or "GENERAL CALL"
0: -
1: Detect "GENERAL CALL"
0: Last received bit is "0"
1: Last received bit is "1"
PIN
R
4
1
AL
R
3
0
AAS
R
2
0
AD0
R
1
0
TMP89FM42
LRB
R
0
*