tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 206

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

14. 8-bit Timer Counter (TC0)
RA002
14.4.6 16-bit event counter mode
(Example)
14.4.6.1 Setting
14.4.6.2 Operations
14.4.6.3 Double buffer
TC00 and TC01 are cascaded to form a 16-bit timer counter, which can measure a longer period than an 8-bit
timer.
In the 16-bit event counter mode, the up counter counts up at the falling edge of the input to the TC00 pin.
settings of TC00 are ignored and those of TC01 are effective in the 16-bit timer mode.
to "1".
and T01REG. Set the lower 8 bits of the 16-bit value at T00REG and set the higher 8 bits at T01REG.
(Hereinafter, the 16-bit value specified by the combined setting of T01REG and T00REG is indicated as
T01+00REG.) The timer register settings are reflected on the double buffer or T01+00REG when a write
instruction is executed on T01REG. Be sure to execute the write instructions on T00REG and T01REG in
this order. (When data is written to the high-order register, the set values of the low-order and high-order
registers become effective at the same time.)
becomes invalid. Be sure to complete the required mode settings before starting the timer. (Make settings
when T001CR<T00RUN> and <T01RUN> are "0".)
TC00 pin. When a match between the up counter value and the T00+01REG set value is detected, an
INTT01 interrupt request is generated and the up counter is cleared to "0x0000". After being cleared, the
up counter restarts counting. Setting T001CR<T01RUN> to "0" during the timer operation makes the up
counter stop counting and be cleared to "0x0000".
[Hz] (in SLOW1/2 or SLEEP1 mode), and a pulse width of two machine cycles or more is required at
both the "H" and "L" levels.
Setting T001CR<TCAS> to "1" connects TC00 and TC01 and activates the 16-bit timer mode. All the
The 16-bit timer mode is activated by setting T01MOD<TCM1> to "00" or "01" and T01MOD<EIN0>
Set the count value to be used for the match detection as a 16-bit value at the timer registers T00REG
Set T01MOD<DBE1> to "1" to use the double buffer.
Setting T001CR<T01RUN> to "1" starts the operation. After the timer is started, writing to T01MOD
Setting T001CR<T01RUN> to "1" allows the 16-bit up counter to increment at the falling edge of the
The maximum frequency to be supplied is fcgck/2 [Hz] (in NORMAL1/2 or IDLE1/2 mode) or fs/2
Refer to 14.4.5.3.
Operate TC00 and TC01 in the 16-bit event counter mode and generate an interrupt each time the 384th falling edge is
detected at the TC00 pin
LD
DI
SET
EI
LD
LD
LD
LD
(POFFCR0),0x10
(EIRH).4
(T00MOD),0xC4
(T00REG),0x80
(T01REG),0x10
(T001CR),0x06
Page 192
; Sets TC001EN to "1"
; Sets the interrupt master enable flag to "disable"
; Sets the INTTC00 interrupt enable register to "1"
; Sets the interrupt master enable flag to "enable"
; Selects the 16-bit event counter mode
; Sets the timer register
; Sets the timer register
; Starts TC00 and TC001 (16-bit mode)
TMP89FM42
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