s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 153

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
FORMAT 2: ADD/SUBTRACT
OPERATION
These instructions allow the contents of a Lo register or a 3-bit immediate value to be added to or subtracted from a
Lo register. The THUMB assembler syntax is shown in Table 4-3.
OP
All instructions in this group set the CPSR condition codes.
0
0
1
1
15
0
0
1
0
1
I
14
0
ADD Rd, Rs, Rn
ADD Rd, Rs, #Offset3
SUB Rd, Rs, Rn
SUB Rd, Rs, #Offset3
THUMB Assembler
13
0
12
1
Table 4-3. Summary of Format 2 Instructions
11
1
10
[2:0] Destination Register
[5:3] Source Register
[8:6] Register/Immediate Vale
[9] Opcode
0 = ADD
1 = SUB
[10] Immediate Flag
0 = Register operand
1 = Immediate oerand
1
ADDS Rd, Rs, Rn
ADDS Rd, Rs, #Offset3
SUBS Rd, Rs, Rn
SUBS Rd, Rs, #Offset3
Figure 4-3. Format 2
Op
9
ARM Equipment
8
NOTE
Rn/Offset3
6
Add contents of Rn to contents of Rs.
Place result in Rd.
Add 3-bit immediate value to contents of
Rs. Place result in Rd.
Subtract contents of Rn from contents of
Rs. Place result in Rd.
Subtract 3-bit immediate value from
contents of Rs. Place result in Rd.
5
Rs
3
Action
THUMB INSTRUCTION SET
2
Rd
0
4-7