s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 460

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

IIC-BUS INTERFACE
20-8
Figure 20-7. Operations for Master/Receiver Mode
The data of the IICDS (slave
Master Rx mode has been
Write 0xB0 (M/R Start) to
SDA is shifted to IICDS.
address) is transmitted.
Write slave address to
Read a new data from
ACK period and then
interrupt is pending.
Clear pending bit to
configured.
IICSTAT.
resume.
START
IICDS.
IICDS.
Stop?
N
Y
Write 0x90 (M/R Stop) to
condition takes effect.
Wait until the stop
Clear pending bit.
IICSTAT.
END
S3C2410A