s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 470

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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IIS-BUS INTERFACE
SAMPLING FREQUENCY AND MASTER CLOCK
Master clock frequency (PCLK) can be selected by sampling frequency as shown in Table 21-1. Because PCLK is
made by IIS prescaler, the prescaler value and PCLK type (256 or 384fs) should be determined properly. Serial bit
clock frequency type (16/32/48fs) can be selected by the serial bit per channel and PCLK as shown in Table 21-2.
21-4
CODECLK
IISLRCK
(MHz)
(fs)
LRCK
SCLK
SD
LRCK
SCLK
SD
256fs
384fs
2.0480
3.0720
8.000
kHz
Figure 21-2. IIS-Bus and MSB (Left)-justified Data Interface Formats
MSB
(1st)
11.025
2.8224
4.2336
kHz
MSB
(1st)
2nd
Bit
Table 21-1. CODEC clock (CODECLK = 256 or 384fs)
16.000
4.0960
6.1440
2nd
Bit
LEFT
kHz
LEFT
MSB-justified Format (N=8 or 16)
22.050
5.6448
8.4672
IIS-bus Format (N=8 or 16)
kHz
N-1th
N-1th
Bit
Bit
12.2880
32.000
8.1920
kHz
(last)
(last)
LSB
LSB
MSB
MSB
(1st)
(1st)
11.2896
16.9344
44.100
kHz
RIGHT
2nd
2nd
Bit
Bit
12.2880
18.4320
48.000
kHz
RIGHT
16.3840
24.5760
N-1th
64.000
Bit
kHz
N-1th
(last)
LSB
Bit
22.5792
33.8688
88.200
LEFT
kHz
(last)
MSB
LSB
(1st)
S3C2410A
24.5760
36.8640
96.000
kHz

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