s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 248

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

DMA
DMA INITIAL DESTINATION (DIDST) REGISTER
DMA INITIAL DESTINATION CONTROL (DIDSTC) REGISTER
8-8
DIDSTCn
Register
D_ADDR
Register
DIDSTC0
DIDSTC1
DIDSTC2
DIDSTC3
DIDSTn
DIDST0
DIDST1
DIDST2
DIDST3
LOC
INC
0x4B0000CC
0x4B0000B8
0x4B00000C
0x4B00004C
0x4B00008C
0x4B000008
0x4B000048
0x4B000088
[30:0]
Address
Address
Bit
Bit
[1]
[0]
Base address (start address) of destination for the transfer. This bit
value will be loaded into CURR_SRC only if the CURR_DST is 0
and the DMA ACK is 1.
Bit 1 is used to select the location of destination.
0: the destination is in the system bus (AHB).
1: the destination is in the peripheral bus (APB).
Bit 0 is used to select the address increment.
0 = Increment
If it is 0, the address is increased by its data size after each
transfer in burst and single transfer mode.
If it is 1, the address is not changed after the transfer.
(In the burst mode, address is increased during the burst transfer,
but the address is recovered to its first value after the transfer.)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DMA 0 initial destination register
DMA 1 initial destination register
DMA 2 initial destination register
DMA 3 initial destination register
DMA 0 initial destination control register
DMA 1 initial destination control register
DMA 2 initial destination control register
DMA 3 initial destination control register
1= Fixed
Description
Description
Description
Description
Reset Value
Reset Value
Initial State
Initial State
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
S3C2410A
0
0