s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 322

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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UART
UART BAUD RATE DIVISOR REGISTER
There are three UART baud rate divisor registers including UBRDIV0, UBRDIV1 and UBRDIV2 in the UART block.
The value stored in the baud rate divisor register (UBRDIVn), is used to determine the serial Tx/Rx clock rate (baud
rate) as follows:
Where, the divisor should be from 1 to (2
For example, if the baud-rate is 115200 bps and PCLK or UEXTCLK is 40 MHz, UBRDIVn is:
11-20
UBRDIV
UBRDIV0
UBRDIV1
UBRDIV2
Register
UBRDIVn
UBRDIVn = (int)(PCLK / (bps x 16) ) –1
or
UBRDIVn = (int)(UEXTCLK / (bps x 16) ) –1
UBRDIVn = (int)(40000000 / (115200 x 16) ) -1
= (int)(21.7) -1
= 21 -1 = 20
0x50000028
0x50004028
0x50008028
Address
[15:0]
Bit
Baud rate division value
UBRDIVn > 0
16
-1) and UEXTCLK should be smaller than PCLK.
R/W
R/W
R/W
R/W
Baud rate divisior register 0
Baud rate divisior register 1
Baud rate divisior register 2
Description
Description
Reset Value
Initial State
S3C2410A

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