s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 84

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

ARM INSTRUCTION SET
INSTRUCTION SUMMARY
3-2
ADC
ADD
AND
B
BIC
BL
BX
CDP
CMN
CMP
EOR
LDC
LDM
LDR
MCR
MLA
MOV
Some instruction codes are not defined but do not cause the Undefined instruction trap to be taken, for
instance a Multiply instruction with bit 6 changed to a 1. These instructions should not be used, as their
action may change in future ARM implementations.
Mnemonic
Add with carry
Add
AND
Branch
Bit Clear
Branch with Link
Branch and Exchange
Coprocessor Data Processing
Compare Negative
Compare
Exclusive OR
Load coprocessor from memory
Load multiple registers
Load register from memory
Move CPU register to coprocessor
register
Multiply Accumulate
Move register or constant
Table 3-1. The ARM Instruction Set
Instruction
NOTE
Rd: = Rn + Op2 + Carry
Rd: = Rn + Op2
Rd: = Rn AND Op2
R15: = address
Rd: = Rn AND NOT Op2
R14: = R15, R15: = address
R15: = Rn, T bit: = Rn[0]
(Coprocessor-specific)
CPSR flags: = Rn + Op2
CPSR flags: = Rn - Op2
Rd: = (Rn AND NOT Op2)
OR (Op2 AND NOT Rn)
Coprocessor load
Stack manipulation (Pop)
Rd: = (address)
cRn: = rRn {<op>cRm}
Rd: = (Rm
Rd: = Op2
Rs) + Rn
Action
S3C2410A