s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 165

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C2410A
OPERATION
These instructions transfer byte or word values between registers and memory. Memory addresses are pre-indexed
using an offset register in the range 0-7. The THUMB assembler syntax is shown in Table 4-8.
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-8. The instruction cycle times
for the THUMB instruction are identical to that of the equivalent ARM instruction.
EXAMPLES
1
L
0
0
1
1
B
0
1
0
STR
LDRB
STR Rd, [Rb, Ro]
STRB Rd, [Rb, Ro]
LDR Rd, [Rb, Ro]
LDRB Rd, [Rb, Ro]
THUMB assembler
R3, [R2,R6]
R2, [R0,R7]
Table 4-8. Summary of Format 7 Instructions
STR Rd, [Rb, Ro]
STRB Rd, [Rb, Ro]
LDR Rd, [Rb, Ro]
LDRB Rd, [Rb, Ro]
ARM equivalent
; Store word in R3 at the address
; formed by adding R6 to R2.
; Load into R2 the byte found at
; the address formed by adding R7 to R0.
Pre-indexed word store:
Calculate the target address by adding
together the value in Rb and the value in
Ro. Store the contents of Rd at the
address.
Pre-indexed byte store:
Calculate the target address by adding
together the value in Rb and the value in
Ro. Store the byte value in Rd at the
resulting address.
Pre-indexed word load:
Calculate the source address by adding
together the value in Rb and the value in
Ro. Load the contents of the address into
Rd.
Pre-indexed byte load:
Calculate the source address by adding
together the value in Rb and the value in
Ro. Load the byte value at the resulting
address.
Action
THUMB INSTRUCTION SET
4-19

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