s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 314

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

UART
UART CONTROL REGISTER (Continued)
NOTE:
11-12
Transmit Mode
Receive Mode
UCONn
When the UART does not reach the FIFO trigger level and does not receive data during 3 word time in DMA receive
mode with FIFO, the Rx interrupt will be generated (receive time out), and the users should check the FIFO status
and read out the rest.
[3:2]
[1:0]
Bit
Determine which function is currently able to write Tx data to the
UART transmit buffer register. (UART Tx Enable/Disable)
00 = Disable
01 = Interrupt request or polling mode
10 = DMA0 request (Only for UART0),
11 = DMA1 request (Only for UART1)
Determine which function is currently able to read data from UART
receive buffer register. (UART Rx Enable/Disable)
00 = Disable
01 = Interrupt request or polling mode
10 = DMA0 request (Only for UART0),
11 = DMA1 request (Only for UART1)
DMA3 request (Only for UART2)
DMA3 request (Only for UART2)
Description
Initial State
S3C2410A
00
00