s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 425

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C2410A
REAL TIME CLOCK SPECIAL REGISTERS
REAL TIME CLOCK CONTROL (RTCCON) REGISTER
The RTCCON register consists of 4 bits such as the RTCEN, which controls the read/write enable of the BCD
registers, CLKSEL, CNTSEL, and CLKRST for testing.
RTCEN bit can control all interfaces between the CPU and the RTC, so it should be set to 1 in an RTC control
routine to enable data read/write after a system reset. Also before power off, the RTCEN bit should be cleared to 0 to
prevent inadvertent writing into RTC registers.
NOTES:
1.
2.
TICK TIME COUNT (TICNT) REGISTER
RTCCON
CLKRST
CNTSEL
CLKSEL
RTCEN
TICNT
TICK INT ENABLE
TICK TIME COUNT
RTCCON
Register
Register
All RTC registers have to be accessed for each byte unit using STRB and LDRB instructions or char type pointer.
(L): Little endian.
(B): Big endian.
TICNT
0x57000043(B)
0x57000047(B)
0x57000040(L)
0x57000044(L)
Bit
[3]
[2]
[1]
[0]
Address
Address
[6:0]
Bit
[7]
RTC clock count reset.
0 = No reset,
BCD count select.
0 = Merge BCD counters
1 = Reserved (Separate BCD counters)
BCD clock select.
0 = XTAL 1/2
1 = Reserved (XTAL clock only for test)
RTC control enable.
0 = Disable
NOTE:
Tick time interrupt enable.
0 = Disable
Tick time count value (1~127).
This counter value decreases internally, and users cannot read
this counter value in working.
Only BCD time count and read operation can be performed.
(by byte)
(by byte)
15
R/W
R/W
R/W
R/W
divided clock
1 = Reset
1 = Enable
RTC control register
Tick time count register
1 = Enable
Description
Description
Description
Description
REAL TIME CLOCK (RTC)
Reset Value
Reset Value
Initial State
Initial State
000000
0x0
0x0
0
0
0
0
0
17-5

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