s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 179

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
FORMAT 15: MULTIPLE LOAD/STORE
OPERATION
These instructions allow multiple loading and storing of Lo registers. The THUMB assembler syntax is shown in the
following table.
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-16. The instruction cycle times
for the THUMB instruction are identical to that of the equivalent ARM instruction.
EXAMPLES
STMIA
L
0
1
STMIA Rb!, { Rlist }
LDMIA Rb!, { Rlist }
15
1
THUMB assembler
R0!, {R3-R7}
14
1
13
0
12
0
Table 4-16. The Multiple Load/Store Instructions
11
L
STMIA Rb!, { Rlist }
LDMIA Rb!, { Rlist }
10
ARM equivalent
[7:0] Register List
[10:8] Base Register
[11] Load/Store Bit
0 = Store to memory
1 = Load from memory
Figure 4-16. Format 15
Rb
8
; Store the contents of registers R3-R7
; starting at the address specified in
; R0, incrementing the addresses for each word.
; Write back the updated value of R0.
7
Store the registers specified by Rlist, starting
at the base address in Rb. Write back the
new base address.
Load the registers specified by Rlist, starting
at the base address in Rb. Write back the
new base address.
Rlist
Action
THUMB INSTRUCTION SET
0
4-33