MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 104

• Manufacturer Part Number: MCIMX31L
• Description: Multimedia Applications Processors
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Electrical Characteristics
4.3.14.2 Functional Description
There are three timing modes supported by the IPU.
4.3.14.2.1
Smart camera sensors, which include imaging processing, usually support video mode transfer. They use
an embedded timing syntax to replace the SENSB_VSYNC and SENSB_HSYNC signals. The timing
syntax is defined by the BT.656 standard.
This operation mode follows the recommendations of ITU BT.656 specifications. The only control signal
used is SENSB_PIX_CLK. Start-of-frame and active-line signals are embedded in the data stream. An
active line starts with a SAV code and ends with a EAV code. In some cases, digital blanking is inserted in
between EAV and SAV code. The CSI decodes and filters out the timing-coding from the data stream, thus
recovering SENSB_VSYNC and SENSB_HSYNC signals for internal use.
4.3.14.2.2
The SENSB_VSYNC, SENSB_HSYNC, and SENSB_PIX_CLK signals are used in this mode. See
Figure
104
45.
Fujitsu
Micron
Matsushita
STMicro
OmniVision
Sharp
Motorola
National Semiconductor
Pseudo BT.656 Video Mode
Gated Clock Mode
Vendor
Table 45. Supported Camera Sensors (continued)
i.MX31/i.MX31L Advance Information, Rev. 1.4
MB86S02A
MI-SOC-0133
MN39980
W6411, W6500, W6501, W6600, W6552, STV0974
OV7620, OV6630
LZ0P3714 (CCD)
MC30300 (Python), SCM20014, SCM20114, SCM22114, SCM20027
LM9618
Preliminary
Model
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