MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 98

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MCIMX31L

Manufacturer Part Number
MCIMX31L
Description
Multimedia Applications Processors
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Electrical Characteristics
98
1
SD10 and SD11 are determined by SDRAM controller register settings.
SD10
SD11
SD3
SD6
SD7
ID
SDCLK
CAS
CKE
ADDR
RAS
WE
CS
SDRAM clock cycle time
Address setup time
Address hold time
Precharge cycle period
Auto precharge command period
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value.
The clock will continue to run unless both CKEs are low. Then the clock will
be stopped in low state.
Don’t care
BA
Table 36. SDRAM Refresh Timing Parameters (continued)
Figure 39. SDRAM Self-Refresh Cycle Timing Diagram
Parameter
i.MX31/i.MX31L Advance Information, Rev. 1.4
1
SD16
1
Preliminary
NOTE
NOTE
Symbol
tCK
tRP
tRC
tAS
tAH
SD16
Min
7.5
1.8
1.8
1
2
Freescale Semiconductor
Max
20
4
clock
clock
Unit
ns
ns
ns

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