MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 4

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MCIMX31L

Manufacturer Part Number
MCIMX31L
Description
Multimedia Applications Processors
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Functional Description and Application Information
The ARM1136JF-S processor core features:
2.1.1
ARM1136JF-S operating frequency in C90LP process:
2.1.2
The ARM1136JF-S complex includes 16 KB Instruction and 16 KB Data L1 caches. It connects to the
i.MX31 and i.MX31L L2 unified cache through 64-bit instruction (read-only), 64-bit data read/write
(bi-directional), and 64-bit data write interfaces.
The embedded 16K SRAM can be used for audio streaming data to avoid external memory accesses for
the Low Power Audio Playback, for Security, or for other applications. There is also a 32-KB ROM for
bootstrap code and other frequently-used code and data.
A ROM patch module provides the ability to patch the internal ROM. It can also initiate an external boot
by overriding the boot reset sequence by a jump to a configurable address.
Table 2
4
Integer unit with integral EmbeddedICE
Eight-stage pipeline
Branch prediction with return stack
Low-interrupt latency
Instruction and data memory management units (MMUs), managed using micro TLB structures
backed by a unified main TLB
Instruction and data L1 caches, including a non-blocking data cache with Hit-Under-Miss
Virtually indexed/physically addressed L1 caches
64-bit interface to both L1 caches
Write buffer (bypassable)
High-speed Advanced Micro Bus Architecture (AMBA)
Vector Floating Point co-processor (VFP) for 3D graphics and other floating-point applications
hardware acceleration
ETM
532 MHz (4 × 133 MHz) (wcs)
shows information about the i.MX31 and i.MX31L core in tabular form.
Performance
Memory System
and JTAG-based debug support
i.MX31/i.MX31L Advance Information, Rev. 1.4
Preliminary
logic
L2 interface
Freescale Semiconductor

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