MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 23

• Manufacturer Part Number: MCIMX31L
• Description: Multimedia Applications Processors
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.3.32
The Watchdog (WDOG) timer module protects against system failures by providing a method of escaping
from unexpected events or programming errors. Once the WDOG module is activated, it must be serviced
by software on a periodic basis. If servicing does not take place, the timer times out. Upon a time-out, the
WDOG Timer module either asserts the wdog signal or a system reset signal wdog_rst depending on
software configuration. The WDOG Timer module also generates a system reset via a software write to
the Watchdog Control Register (WCR), a detection of a clock monitor event, an external reset, an external
JTAG reset signal, or if a power-on-reset has occurred.
3
This section:
3.1
This section identifies and defines all device signals in
on page
3.1.1
Table 4
function of each pin by configuring the appropriate GPIO registers when those pins are multiplexed to
provide different functions.
Freescale Semiconductor
Pin Name Group
WATCHDOG
COMPARE
CAPTURE
GPIO1_0
PWMO
_RST
•
•
Signal Descriptions
Identifies and defines all device signals in text, tables, and (as appropriate) figures. Signals can be
organized by group, as applicable.
Contains pin-assignment/contact-connection diagrams, if the sequence of information in the data
sheet requires them to be included here. Otherwise, these figures appear in
Information and Pinout.”
shows functional multiplexing information. Functional multiplexing allows the user to select the
56.
i.MX31 and i.MX31L I/O Pad Signal Settings
Watchdog Module (WDOG)
Functional Multiplexing
WTDG
GPIO1
Timer
Timer
PWM
Timer Output Compare for
for Memstick2 card detect
Timer1 input clock. GPIO
user for Memstick1 Card
timers 1 2 3. GPIO used
GPIO reserved for IRQs
Timer input Capture or
Description
watchdog reset.
PWM output.
detect
i.MX31/i.MX31L Advance Information, Rev. 1.4
Hardware
ATA_DATA14
ATA_DATA15
ATA_IORDY
Mode 1
Table 4. Functional Multiplexing
–
–
Mode
HW
2
–
–
–
–
–
Preliminary
sw_mux_ctl_
sw_mux_ctl_
sw_mux_ctl_
sw_mux_ctl_
sw_mux_ctl_
watchdog_rs
pwmo[6:0]
compare
MUX_
gpio1_0
capture
Table 4 on page
SW_
t[6:0]
[6:0]
[6:0]
[6:0]
EN
EXTDM
Mode
PC_SP
CAP2
KOUT
A_0
Alt
1
–
–
Mode
IPU_FL
TROBE
ASH_S
CMP2
CMP3
Alt
2
–
–
23,
Table 6 on page
Mode
Alt
3
–
–
–
–
–
ipp_epit
Mode
Alt
o1
4
Section 5, “Package
–
–
–
–
ipp_epit
Mode
Signal Descriptions
Alt
o2
5
–
–
–
–
39, and
Mode
Alt
6
–
–
–
–
–
Table 7
MCU1_
MCU1_
MCU1_
MCU1_
GPIO
7
8
–
9
0
23