MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 95

• Manufacturer Part Number: MCIMX31L
• Description: Multimedia Applications Processors
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor
1
Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 38
SD10
SD9
ID
and
Data out hold time
Active to read/write command period
Table
SDR SDRAM CLK parameters are being measured from the 50%
point–that is, high is defined as 50% of signal value and low is defined as
50% of signal value. SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
The timing parameters similar to the ones used in the regular SDRAM data
sheet. All output signals are driven by the ESDCTL at the negative edge of
SDCLK and the parameters are measured at maximum memory frequency.
Table 34. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
39.
1
i.MX31/i.MX31L Advance Information, Rev. 1.4
Parameter
Preliminary
NOTE
NOTE
Symbol
tOH
tRC
Min
1.5
10
Electrical Characteristics
Max
–
–
clock
Unit
ns
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