MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 62

• Manufacturer Part Number: MCIMX31L
• Description: Multimedia Applications Processors
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

6
7
8
9
10
Electrical Characteristics
Table 10
frequencies of the ARM11 core.
Table 11
see
Table 12
62
Recommended maximum OVDD operating voltage is 3.1 V for GPIO in either slow or fast mode. Switching duty cycles must
be limited to a cumulative duration of 1 year or less (20% duty cycle for a 5yr rated part) to sustain a MAX OVDD operating
voltage of 3.3V without significant device degradation. A switching cycle is defined as the period of time that the pad is powered
to OVDD and actively switching. Switching cycles exceeding this limit may affect device performance or cause permanent
damage to the device.
The performance at 1.8 V of GPIO devices that are operated at 3.3 V over an extended period of time (for example. 2 years or
longer at a 20% duty cycle) is not guaranteed. Reliability degradation may render the device too slow or inoperable.
Overshoot and undershoot conditions (transitions above OVDD and below OVSS) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other methods.
Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
For normal operating conditions, PLLs’ and core supplies must maintain the following relation: PLL ≥ Core – 100 mV. In other
words, for a 1.6 V core supply, PLL supplies must be set to 1.5 V or higher.
Providing a voltage that is lower than specified does not prevent the fuses from being blown if attempting to program a fuse.
ID
1
2
3
Section 4.3.8, “DPLL Electrical
JTAG TCK Frequency
CKIL Frequency
CKIH Frequency
provides information for interface frequency limits. For more details about clocks characteristics,
gives details of the applied voltages to the i.MX31/i.MX31L Core Supply I/O versus the
provides the DC absolute maximum operating conditions.
1
2
3
As measured at the ball. Recommended settings for PMIC (Power Management IC) is 1.275 V.
All overdrive/25% duty-cycles restrictions apply, as specified in
As measured at the ball. Recommended voltage settings for PMIC is 1.6 V.
ID
Stresses beyond those listed under
Conditions,” (Table
are stress ratings only. Functional operation of the device at these or any
other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions
for extended periods may affect device reliability.
1
2
ARM11 (V
Parameter
Core
DD
)
i.MX31/i.MX31L Advance Information, Rev. 1.4
Table 10. Voltage versus Core Frequency
12) may cause permanent damage to the device. These
Specifications”
Table 11. Interface Frequency
Symbol
f
f
ARM
ARM
CAUTION
Preliminary
Symbol
“DC Absolute Maximum Operating
f
f
f
JTAG
CKIH
CKIL
on page
Min (V)
1.22
1.55
1
3
82.
Min
DC
32
10
Max (V)
1.65
1.65
Table
1, 2
3
9.
32.768
Frequency (MHz)
Typ
26
5
401–532
0–400
Freescale Semiconductor
Max
38.4
100
10
Units
MHz
MHz
kHz