MCIMX31L FREESCALE [Freescale Semiconductor, Inc], MCIMX31L Datasheet - Page 5

• Manufacturer Part Number: MCIMX31L
• Description: Multimedia Applications Processors
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.2
Table 3
cross-reference is provided directly to each module description for more information.
Freescale Semiconductor
ARM11 or
ARM1136
Mnemonic
1-Wire®
ATA
AUDMUX
CCM
CSPI
ECT
EMI
EPIT
Acronym
Core
Block
shows an alphabetical listing of the modules in the multimedia applications processor. A
Module Inventory
ARM1136
Platform
1-Wire Interface Connectivity
Advanced
Technology (AT)
Attachment
Digital Audio
Multiplexer
Clock Control
Module
Configurable
Serial Peripheral
Interface (x 3)
Embedded
Cross Trigger
External
Memory
Interface
Enhanced
Periodic
Interrupt Timer
Name
Core
Block Name
The ARM1136™ Platform consists of the ARM1136JF-S core, the ETM
real-time debug modules, a 6 x 5 multi-layer AHB crossbar switch (MAX), and a
Vector Floating Processor (VFP).
The i.MX31/i.MX31L provide a high-performance ARM11 microprocessor core
and highly integrated system functions. The ARM Application Processor (AP)
and other subsystems address the needs of the personal, wireless, and portable
product market with integrated peripherals, advanced processor core, and
power management capabilities.
Peripheral
Connectivity
Peripheral
Multimedia
Peripheral
Clock
Connectivity
Peripheral
Debug
Memory
Interface (EMI)
Timer
Peripheral
Functional
Grouping
i.MX31/i.MX31L Advance Information, Rev. 1.4
Table 3. Digital and Analog Modules
Table 2. i.MX31/i.MX31L Core
The 1-Wire module provides bi-directional communication between
the ARM11 core and the Add-Only-Memory EPROM (DS2502).
The 1-Kbit EPROM is used to hold information about battery and
communicates with the ARM11 platform using the IP interface.
The ATA block is an AT attachment host interface. It is designed to
interface with IDE hard disc drives and ATAPI optical disc drives.
The AUDMUX interconnections allow multiple, simultaneous
audio/voice/data flows between the ports in point-to-point or
point-to-multipoint configurations.
The CCM provides clock, reset, and power management control for
the i.MX31 and i.MX31L.
The CSPI is equipped with data FIFOs and is a master/slave
configurable serial peripheral interface module, capable of
interfacing to both SPI master and slave devices.
The ECT is composed of three CTIs (Cross Trigger Interface) and
one CTM (Cross Trigger Matrix—key in the multi-core and multi-IP
debug strategy.
The EMI includes
The EPIT is a 32-bit “set and forget” timer which starts counting
after the EPIT is enabled by software. It is capable of providing
precise interrupts at regular intervals with minimal processor
intervention.
• Multi-Master Memory Interface (M3IF)
• Enhanced SDRAM/MDDR memory controller (SDRAMC)
• NAND Flash Controller (NFC)
• Wireless External Interface Module (WEIM)
Brief Description
Preliminary
Functional Description and Application Information
Brief Description3
Integrated Memory
• 16 Kbyte
• 16 Kbyte Data
• 128 Kbyte L2
• 32 Kbyte ROM
• 16 Kbyte RAM
Instruction Cache
Cache
Cache
Includes
Section/
2.3.5/10
2.3.6/10
2.3.7/11
2.3.8/12
2.3.1/8
2.3.2/8
2.3.3/9
2.3.4/9
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