AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 100

no-image

AM8530H

Manufacturer Part Number
AM8530H
Description
Serial Communications Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM8530H--8PC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
AM8530H-4DC
Manufacturer:
FC
Quantity:
13
Part Number:
AM8530H-4DC
Manufacturer:
AMD
Quantity:
802
Part Number:
AM8530H-4DCB
Manufacturer:
AMD
Quantity:
802
Part Number:
AM8530H-4JC
Manufacturer:
AMD
Quantity:
5 510
Part Number:
AM8530H-4JC
Manufacturer:
MOT
Quantity:
5 510
Part Number:
AM8530H-4JC
Manufacturer:
AMD
Quantity:
2 606
Part Number:
AM8530H-4JI
Manufacturer:
AMD
Quantity:
3 711
Part Number:
AM8530H-4PC
Manufacturer:
AMD
Quantity:
913
Part Number:
AM8530H-4PC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
AM8530H-6JC
Manufacturer:
AMD
Quantity:
5 510
Part Number:
AM8530H-6JC
Manufacturer:
SIEMENS
Quantity:
5 510
Part Number:
AM8530H-6JC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
AM8530H-6PC
Manufacturer:
AMD
Quantity:
20 000
AMD
5.3
Each channel in the SCC contains a programmable BRG. Each generator consists of two
8-bit, time-constant registers forming a 16-bit time constant, a 16-bit down counter, and a
flip-flop on the output that makes the output a square wave. On start-up, the flip-flop on
the output is set High so that it starts in a known state, the value in the time-constant reg-
ister is again loaded into the counter, and the counter begins counting down.
Upon reaching a count of zero, the output of the BRG toggles and the time-constant value
held in WR12 and WR13 is reloaded into the down counter and the process of counting
down starts over. When the zero count is reached, the output of the BRG toggles, and for
the duration of the zero count, the Zero Count status signal goes active to the External/
Status interrupt section. Refer to Zero Count Section for details on the Zero Count Status
bit in RR0. While the BRG is disabled the state of the Zero Count status bit in RR0 will
always read ‘0’ providing the Zero Count IE bit in WR15 is reset. While the Zero Count IE
bit is set, the Zero Count status bit in RR0 will be set to ‘1’ for as long as the BRG counter
is at the count of zero. This status bit is forced active by a hardware reset.
No attempt is made to synchronize the loading of a new time constant with the clock used
to drive the BRG. When the time-constant is to be changed, the generator should be
stopped by resetting bit D0 of WR14. This ensures the loading of a correct time constant.
The time-constant for the BRG is programmed in WR12 and WR13, with the least signifi-
cant byte in WR12. The formulas relating the baud rate to the time-constant and vice
versa are shown in Table 5–1 with an example. In these formulas the BRG clock fre-
quency is in Hertz, the desired baud rate in bits/second and the time-constant is dimen-
sionless. The example in Table 5–2 assumes a 2.4576 MHz clock frequency and shows
the time-constant for a number of popular baud rates.
5–6
BAUD RATE GENERATOR (BRG)
Time Constant =
Baud Rate =
Table 5–1. Time Constant Formulas
For 2.4576 MHz, X16 Clock Mode
Baud Rate
Table 5–2. Baud Rate Example
38400
19200
9600
4800
2400
1200
600
300
150
2 (Clock Mode) (Time Constant + 2)
2 (Clock Mode) (Baud Rate)
Clock Frequency
Decimal
Clock Frequency
126
254
510
14
30
62
0
2
6
Divider
Support Circuitry Programming
000EH
001EH
003EH
007EH
00FEH
01FEH
0000H
0002H
0006H
Hex
–2

Related parts for AM8530H