AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 86

• Manufacturer Part Number: AM8530H
• Description: Serial Communications Controller
• Manufacturer: AMD [Advanced Micro Devices]

AMD
SYNC
PCLK
RTxC
4.10.1.2
In Synchronous modes, the sync character length that is used during transmit and receive
operations is programmable via bit D0 of WR10.
If this bit is set to ‘0’ in MONOSYNC mode an 8-bit sync character will be used during
transmit and receive operations; however, if set to ‘1’ the 6-bit sync character option will
be selected, and only the least significant six bits of WR6 will be used during transmis-
sion, and the six high-order bits in WR7 will be used during receive.
In BISYNC mode, this bit selects between a 12- or 16-bit sync character length; however,
because the receiver requires that sync characters be left-justified in the registers, while
the transmitter requires them to be right-justified, only the receiver will work properly with
a 12-bit sync character. So if bit D0 of WR10 is set to ‘1’, the receiver will be configured to
recognize a 12-bit sync character, but the transmitter will remain configured for a 16-bit
sync character. The arrangement of the sync character in WR6 and WR7 is shown in Fig-
ure 4–23.
4.10.1.3
The initialization sequence for the receiver in Synchronous modes is to write to WR4 first,
to select the mode, then WR10 to modify it if necessary, WR6 and WR7 to program the
sync characters and then WR3 and WR5 to select the various options. At this point the
other registers should be initialized as necessary. When all of this is complete the re-
ceiver is enabled by setting bit D0 of WR3 to ‘1’.
4.10.1.4
In Synchronous modes, a sync character that is not part of the data is transmitted before
data to establish character synchronization at the receiver. Once data transmission be-
gins all characters are sent continuously and in phase with each other. Since this syn-
chronizing information is only present at the beginning of a message it may happen that
during message transmission the combination of data characters may not provide suffi-
4–34
SYNC
SYN
SYNC Character Length
Receiver Initialization
SYNC Character Removal
SYN
Figure 4–21. MONOSYNC Message Format
Figure 4–22. BISYNC Message Format
SOH
Figure 4–20. SYNC as an Output
HEADER
Data Communication Modes Functional Description
DATA
STX
DIRECTION OF SERIAL DATA FLOW
TEXT
ETX
ETB
or
BCC
CRC