AM8530H AMD [Advanced Micro Devices], AM8530H Datasheet - Page 32

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AM8530H

Manufacturer Part Number
AM8530H
Description
Serial Communications Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
CHAPTER 3
I/O Programming Functional
Description
Introduction
Polling
Interrupt Sources
Interrupt Control
3.4.1 Interrupt Enable Bit
3.4.2 Interrupt Pending Bit
3.4.3 Interrupt Under Service Bit
3.4.4 Disable Lower Chain Bit
Interrupt Operations
3.5.1 Multiple Interrupt Priority Resolution
3.5.2 Interrupt Without Acknowledge
3.5.3 Interrupt With Acknowledge With Vector
3.5.4 Interrupt With Acknowledge Without Vector
3.5.5 Lower Priority Interrupt Masking
Receive Interrupts
3.6.1 Receive Interrupts Disabled
3.6.2 Receive Interrupt on First Character or
3.6.3 Receive Interrupt on All Receive Characters or
3.6.4 Receive Interrupt on Special Conditions
Transmit Interrupts
External/Status Interrupts
3.8.1 Sync/Hunt
3.8.2 Break/Abort
3.8.3 Zero Count
3.8.4 Tx Underrun/EOM
3.8.5 Clear To Send
3.8.6 Data Carrier Detect
Block Transfers
3.9.1 Wait on Transmit
3.9.2 Wait on Receive
3.9.3 DMA Requests
Special Condition
Special Conditions
3.9.3.1 DMA Request on Transmit
3.9.3.2 DMA Request on Transmit
3.9.3.3 DTR/REQ Deactivation Timing
3.9.3.4 DMA Request on Receive (using W/REQ)
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(using W/REQ)
(using DTR/REQ)
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3–3
3–3
3–3
3–4
3–4
3–5
3–5
3–5
3–6
3–6
3–8
3–8
3–10
3–10
3–10
3–10
3–10
3–11
3–11
3–12
3–13
3–13
3–14
3–14
3–15
3–15
3–15
3–15
3–16
3–16
3–17
3–17
3–18
3–19
3–20
3–1

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