ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 117

KIT EVAL FOR AT32UC3A0

ATEVK1105

Manufacturer Part Number
ATEVK1105
Description
KIT EVAL FOR AT32UC3A0
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1105

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A0512
Processor Series
AVR
Data Bus Width
32 bit
Interface Type
USART, TWI, USB, SPI, Ethernet
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A0512
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.4.5
18.4.6
32058J–AVR32–04/11
Quick Page Read
Write page buffer operations
The flash controller supports flash blocks with up to 2^21 word addresses, as displayed in
ure
result. The User page is permanently mapped to word address 2^21.
Table 18-1.
Figure 18-1. Memory map for the Flash memories
A dedicated command, Quick Page Read (QPR), is provided to read all words in an
addressed page. All bits in all words in this page are AND’ed together, returning a 1-bit result.
This result is placed in the Quick Page Read Result (QPRR) bit in Flash Status Register
(FSR). The QPR command is useful to check that a page is in an erased state. The QPR
instruction is much faster than performing the erased-page check using a regular software
subroutine.
The internal memory area reserved for the embedded flash can also be written through a
write-only page buffer. The page buffer is addressed only by the address bits required to
address w words (since the page buffer is word addressable) and thus wrap around within the
internal memory area address space and appear to be repeated within it.
When writing to the page buffer, the PAGEN field in the FCMD register is updated with the
page number corresponding to page address of the latest word written into the page buffer.
Memory type
Main array
User
18-1. Reading the memory space between address pw and 2^21-1 returns an undefined
User row addresses
2 ^ 2 1 + 1 2 8
A ll a d d r e s s e s a r e w o r d a d d r e s s e s
Start address, byte sized
0
2^23 = 8388608
p w - 1
2 ^ 2 1
p w
F la s h w it h
e x t r a p a g e
0
U n u s e d
U s e r p a g e
Size
pw words = 4pw bytes
128 words = 512 bytes
AT32UC3A
Fig-
117

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