ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 702
![KIT EVAL FOR AT32UC3A0](/photos/9/20/92036/atevk1105_sml.jpg)
ATEVK1105
Manufacturer Part Number
ATEVK1105
Description
KIT EVAL FOR AT32UC3A0
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.ATEVK1104.pdf
(826 pages)
3.ATEVK1105.pdf
(28 pages)
Specifications of ATEVK1105
Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A0512
Processor Series
AVR
Data Bus Width
32 bit
Interface Type
USART, TWI, USB, SPI, Ethernet
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A0512
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 702 of 826
- Download datasheet (20Mb)
33.6
33.6.1
33.6.2
33.6.3
32058J–AVR32–04/11
Functional Description
Analog-to-digital Conversion
Conversion Reference
Conversion Resolution
The ADC uses the ADC Clock to perform conversions. Converting a single analog value to a 10-
bit digital data requires Sample and Hold Clock cycles as defined in the field SHTIM of the MR
register and 10 ADC Clock cycles. The ADC Clock frequency is selected in the PRESCAL field
of the MR register.
The ADC clock range is between CLK_ADC/2, if PRESCAL is 0, and CLK_ADC/128, if PRES-
CAL is set to 63 (0x3F). PRESCAL must be programmed in order to provide an ADC clock
frequency according to the parameters given in the Product definition section.
The conversion is performed on a full range between 0V and
Analog inputs between these voltages convert to values based on a linear conversion.
The ADC supports 8-bit or 10-bit resolutions. The 8-bit selection is performed by setting the bit
LOWRES in the ADC Mode Register (MR). By default, after a reset, the resolution is the highest
and the DATA field in the data registers is fully used. By setting the bit LOWRES, the ADC
switches in the lowest resolution and the conversion results can be read in the eight lowest sig-
nificant bits of the data registers. The two highest bits of the DATA field in the corresponding
CDR register and of the LDATA field in the LCDR register read 0.
Moreover, when a PDC channel is connected to the ADC, 10-bit resolution sets the transfer
request sizes to 16-bit. Setting the bit LOWRES automatically switches to 8-bit data transfers. In
this case, the destination buffers are optimized.
the reference voltage pin ADVREF.
AT32UC3A
702
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