ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 262

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 25-3. SSC Functional Block Diagram
25.7.1
32058J-AVR32-04/11
Peripheral
CLK_SSC
Bus
Clock Management
PDCA
Interface
Divider
Clock
User
Interrupt Controller
Interrupt Control
The transmitter clock can be generated by:
The receiver clock can be generated by:
Furthermore, the transmitter block can generate an external clock on the TX_CLOCK I/O pad,
and the receiver block can generate an external clock on the RX_CLOCK I/O pad.
This allows the SSC to support many Master and Slave Mode data transfers.
• an external clock received on the TX_CLOCK I/O pad
• the receiver clock
• the internal clock divider
• an external clock received on the RX_CLOCK I/O pad
• the transmitter clock
• the internal clock divider
TX_FRAME_SYNC
RX_FRAME_SYNC
TX_FRAME_SYNC
RX_FRAME_SYNC
TX_CLOCK Input
RX_CLOCK
TX clock
RX clock
Input
Selector
Selector
TX_PDCA
Start
Start
RX_PDCA
Load Shift
Load Shift
Transmitter
Transmit Clock
Receive Clock
Controller
Controller
Receiver
Transmit Holding
Receive Holding
Register
Register
Transmit Shift Register
Receive Shift Register
RX clock
TX clock
Holding Register
Holding Register
Transmit Sync
Receive Sync
Clock Output
Clock Output
Frame Sync
Frame Sync
Controller
Controller
Controller
Controller
RX_CLOCK
RX_FRAME_SYNC
TX_CLOCK
TX_FRAME_SYNC
RX_DATA
TX_DATA
AT32UC3A
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