ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 153

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21. Peripheral DMA Controller (PDCA)
21.1
21.2
32058J–AVR32–04/11
Features
Overview
rev: 1.0.0.0
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•
The Peripheral DMA controller (PDCA) transfers data between on-chip peripheral modules such
as USART, SPI, SSC and on- and off-chip memories. Using the PDCA avoids CPU intervention
for data transfers, improving the performance of the microcontroller. The PDCA can transfer
data from memory to a peripheral or from a peripheral to memory.
The PDCA consists of a number of DMA channels. Each channel has:
The PDCA communicates with the peripheral modules over a number of handshake interfaces.
The peripheral signals to the PDCA when it is ready to receive or transmit data. The PDCA
acknowledges the request when the transmission has started.
The number of handshake-interfaces may be higher than the number of DMA channels. If this is
the case, the DMA channel must be programmed to use the desired interface.
When a transmit buffer is empty or a receive buffer is full, an interrupt request can be signalled.
• A 32-bit memory pointer
• A 16-bit transfer counter
• A 32-bit memory pointer reload value
• A 16-bit transfer counter reload value
Generates Transfers to/from Peripherals such as USART, SSC and SPI
Two address pointers/counters per channel allowing double buffering
AT32UC3A
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