R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 1038
R0K572115S000BE
Manufacturer Part Number
R0K572115S000BE
Description
KIT STARTER FOR SH7211
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
Microcontrollerr
Specifications of R0K572115S000BE
Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7211
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 1038 of 1198
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24.2
Table 24.1 Pin Configuration
Note:
Rev. 3.00 Mar. 04, 2009 Page 1012 of 1168
REJ09B0344-0300
Pin Name
H-UDI serial data input/output
clock pin
Mode select input pin
H-UDI reset input pin
H-UDI serial data input pin
H-UDI serial data output pin
ASE mode select pin
* When the emulator is not in use, fix this pin to the high level.
Input/Output Pins
Symbol
TCK
TMS
TRST
TDI
TDO
ASEMD*
I/O
Input
Input
Input
Input
Output
Input
Function
Data is serially supplied to the H-UDI from
the data input pin (TDI), and output from
the data output pin (TDO), in
synchronization with this clock.
The state of the TAP control circuit is
determined by changing this signal in
synchronization with TCK. For the protocol,
see figure 24.2.
Input is accepted asynchronously with
respect to TCK, and when low, the H-UDI is
reset. TRST must be low for a constant
period when power is turned on regardless
of using the H-UDI function. See section
24.4.2, Reset Configuration, for more
information.
Data transfer to the H-UDI is executed by
changing this signal in synchronization with
TCK.
Data read from the H-UDI is executed by
reading this pin in synchronization with
TCK. The initial value of the data output
timing is the TCK falling edge. This can be
changed to the TCK rising edge by
inputting the TDO change timing switch
command to SDIR. See section 24.4.3,
TDO Output Timing, for more information.
If a low level is input at the ASEMD pin
while the RES pin is asserted, ASE mode is
entered; if a high level is input, normal
mode is entered. In ASE mode, dedicated
emulator function can be used. The input
level at the ASEMD pin should be held for
at least one cycle after RES negation.
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