R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 954

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

(2.4) FKEY is cleared to H'00 for protection.
(2.5) The value of the DPFR parameter must be checked to confirm the download result.
Rev. 3.00 Mar. 04, 2009 Page 928 of 1168
REJ09B0344-0300
1. The user MAT space is switched to the on-chip program storage area.
2. After the selection condition of the download program and the address set in FTDAR are
3. The SCO bits in FCCS, FPCS, and FECS are cleared to 0.
4. The return value is set to the DPFR parameter.
5. After the on-chip program storage area is returned to the user MAT space, execution
After download is completed and the user procedure program is running, the VBR setting can
be changed.
The notes on download are as follows.
In the download processing, the values of the general registers of the CPU are retained.
During the download processing, interrupts must not be generated. For details on the
relationship between download and interrupts, see section 21.7.2, Interrupts during
Programming/Erasing.
Since a stack area of maximum 256 bytes is used, an area of at least 128 bytes must be saved
before setting the SCO bit to 1.
If flash memory is accessed by the DMAC during downloading, operation cannot be
guaranteed. Therefore, access by the DMAC must not be executed.
A recommended procedure for confirming the download result is shown below.
1. Check the value of the DPFR parameter (one byte of start address of the download
2. If the value of the DPFR parameter is the same as before downloading (e.g. H'FF), the
3. If the value of the DPFR parameter is different from before downloading, check the SS bit
checked, the transfer processing is executed starting to the on-chip RAM address specified
by FTDAR.
returns to the user procedure program.
destination specified by FTDAR). If the value is H'00, download has been performed
normally. If the value is not H'00, the source that caused download to fail can be
investigated by the description below.
address setting of the download destination in FTDAR may be abnormal. In this case,
confirm the setting of the TDER bit (bit 7) in FTDAR.
(bit 2) and the FK bit (bit 1) in the DPFR parameter to ensure that the download program
selection and FKEY register setting were normal, respectively.