R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 87

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R0K572115S000BE

Manufacturer Part Number
R0K572115S000BE
Description
KIT STARTER FOR SH7211
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
Microcontrollerr
Datasheets

Specifications of R0K572115S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7211
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
This LSI has a clock pulse generator (CPG) that generates an internal clock (Iφ), a peripheral clock
(Pφ), a bus clock (Bφ), an MTU2S clock (Mφ), and an AD clock (Aφ). The CPG consists of a
crystal oscillator, PLL circuits, and divider circuits.
4.1
• Clock operating modes
• Five clocks generated independently
• Frequency change function
• Power-down mode control
Figure 4.1 shows a block diagram of the clock pulse generator.
Either the internal crystal resonator or the input on the external clock-signal line can be
selected.
An internal clock (Iφ) for the CPU, a peripheral clock (Pφ) for the peripheral modules, a bus
clock (Bφ = CK) for the external bus interface, an MTU2S clock (Mφ) for the MTU2S module,
and an AD clock (Aφ) for the ADC module can be generated independently.
Internal and peripheral clock frequencies can be changed independently using the PLL (phase
locked loop) circuits and divider circuits within the CPG. Frequencies are changed by software
using frequency control register (FRQCR) settings.
The clock can be stopped for sleep mode and software standby mode, and specific modules can
be stopped using the module standby function. For details on clock control in the power-down
modes, see section 23, Power-Down Modes.
Features
Section 4 Clock Pulse Generator (CPG)
Rev. 3.00 Mar. 04, 2009 Page 61 of 1168
REJ09B0344-0300

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