R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 1192

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Rev. 3.00 Mar. 04, 2009 Page 1166 of 1168
REJ09B0344-0300
STBCR ............................................... 995
STBCR2 ............................................. 996
STBCR3 ............................................. 997
STBCR4 ............................................. 999
SYSCR1 ........................................... 1001
SYSCR2 ........................................... 1003
TADCOBRA_4 .................................. 409
TADCOBRB_4 .................................. 409
TADCORA_4..................................... 409
TADCORB_4 ..................................... 409
TADCR............................................... 406
TBTER ............................................... 434
TBTM................................................. 401
TCBR.................................................. 431
TCDR ................................................. 430
TCNT.................................................. 410
TCNTCMPCLR.................................. 388
TCNTS ............................................... 429
TCR .................................................... 362
TCSYSTR........................................... 415
TDDR ................................................. 430
TDER.................................................. 436
TGCR ................................................. 427
TGR .................................................... 410
TICCR ................................................ 403
TIER ................................................... 389
TIOR................................................... 369
TITCNT .............................................. 433
TITCR................................................. 431
TMDR................................................. 366
TOCR1 ............................................... 420
TOCR2 ............................................... 423
TOER.................................................. 419
TOLBR ............................................... 426
TRWER .............................................. 418
TSR..................................................... 394
TSTR .................................................. 411
TSYCR ............................................... 404
TSYR.................................................. 413
TWCR................................................. 437
Relationship between access size and
number of bursts ..................................... 251
Relationship between clock operating
mode and frequency range ........................ 67
Relationship between refresh requests
and bus cycles ......................................... 269
Reset state ................................................. 54
Reset-synchronized PWM mode............. 469
Restoration from bank............................. 137
Restoration from stack ............................ 138
Restriction on DMAC usage ................... 722
RISC-type instruction set .......................... 22
Round-robin mode .................................. 333
S
Saving to bank ........................................ 136
Saving to stack ........................................ 138
SCIF interrupt sources ............................ 720
SDRAM interface ................................... 243
Self-refreshing ........................................ 267
Sending a break signal ............................ 722
Serial communication interface
with FIFO (SCIF).................................... 665
Setting analog input voltage.................... 801
Shift instructions ....................................... 48
Sign extension of word data...................... 22
Single address mode ............................... 339
Single chip mode ...................................... 57
Single read .............................................. 254
Single write ............................................. 257
Single-cycle scan mode........................... 781
Slave receive operation ........................... 752
Slave transmit operation ......................... 749
Sleep mode............................................ 1005
WAVECR1 ......................................... 861
WAVECR2 ......................................... 860
WRCSR .............................................. 655
WTCNT .............................................. 652
WTCSR............................................... 653