R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 932

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 21.6 Usable Parameters and Target Modes
Note:
(1)
The on-chip program is automatically downloaded by setting the SCO bit to 1. The on-chip RAM
area to be downloaded is the area as much as 3 kbytes starting from the start address specified by
FTDAR. For the address map of the on-chip RAM, see figure 21.10.
The download control is set by using the programming/erasing interface registers. The return
value is given by the DPFR parameter.
(a)
This parameter indicates the return value of the download result. The value of this parameter can
be used to determine if downloading is executed or not. Since the confirmation whether the SCO
bit is set to 1 is difficult, the certain determination must be performed by setting one byte of the
start address of the on-chip RAM area specified by FTDAR to a value other than the return value
of download (for example, H'FF) before the download start (before setting the SCO bit to 1). For
Rev. 3.00 Mar. 04, 2009 Page 906 of 1168
REJ09B0344-0300
Name of
Parameter
Download pass/fail
result
Flash pass/fail
result
Flash
programming/
erasing frequency
control
Flash user branch
address set
Flash multipurpose
address area
Flash multipurpose
data destination
area
Flash erase block
select
Download Control
Download Pass/Fail Result Parameter (DPFR: One Byte of Start Address of On-Chip
RAM Specified by FTDAR)
* One byte of start address of download destination specified by FTDAR
Abbrevia-
tion
DPFR
FPFR
FPEFEQ
FUBRA
FMPAR
FMPDR
FEBS
Down-
load
√
—
—
—
—
—
—
Initiali-
zation
—
√
√
√
—
—
—
Pro-
gram-
ming Erasure R/W
—
√
—
—
√
√
—
—
√
—
—
—
—
√
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial
Value
Undefined On-chip
Undefined R0 of CPU
Undefined R4 of CPU
Undefined R5 of CPU
Undefined R5 of CPU
Undefined R4 of CPU
Undefined R4 of CPU
Allocation
RAM*