R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 251

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8.4.5
RTCSR specifies various items about refresh for SDRAM. RTCSR is initialized to H'00000000 by
a power-on reset and retains the value by a manual reset and in software standby mode.
When RTCSR is written, the upper 16 bits of the write data must be H'A55A to cancel write
protection.
The phase of the clock for incrementing the count in the refresh timer counter (RTCNT) is
adjusted only by a power-on reset. Note that there is an error in the time until the compare match
flag is set for the first time after the timer is started with the CKS[2:0] bits being set to a value
other than B'000.
Initial value:
Initial value:
Bit
31 to 8
7
R/W:
R/W:
Bit:
Bit:
Refresh Timer Control/Status Register (RTCSR)
Bit Name
⎯
CMF
31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
29
13
R
R
0
0
-
-
Initial
Value
All 0
0
28
12
R
R
0
0
-
-
27
11
R
R
0
0
-
-
R/W
R
R/W
26
10
R
R
0
0
-
-
Description
Reserved
These bits are always read as 0.
Compare Match Flag
Indicates that a compare match occurs between the
refresh timer counter (RTCNT) and refresh time
constant register (RTCOR). This bit is set or cleared in
the following conditions.
0: Clearing condition: When 0 is written in CMF after
1: Setting condition: When the condition RTCNT =
25
R
R
0
9
0
-
-
reading out RTCSR during CMF = 1.
RTCOR is satisfied.
24
R
R
0
8
0
-
-
R/W
CMF
23
R
0
7
0
-
Rev. 3.00 Mar. 04, 2009 Page 225 of 1168
CMIE
R/W
22
R
0
6
0
-
R/W
21
R
0
5
0
-
CKS[2:0]
R/W
20
R
0
4
0
-
R/W
19
R
0
3
0
-
REJ09B0344-0300
R/W
18
R
0
2
0
-
RRC[2:0]
R/W
17
R
0
1
0
-
R/W
16
R
0
0
0
-