R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 920

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

(2) Download of On-Chip Program
(3) Initialization of Programming/Erasing
(4) Programming/Erasing Execution
(5) When Programming/Erasing is Executed Consecutively
Rev. 3.00 Mar. 04, 2009 Page 894 of 1168
REJ09B0344-0300
The on-chip program is automatically downloaded by clearing VBR of the CPU to
H'80000000 and then setting the SCO bit in the flash code control and status register (FCCS)
and the flash key code register (FKEY), which are programming/erasing interface registers.
The user MAT is replaced to the embedded program storage area when downloading. Since the
flash memory cannot be read when programming/erasing, the procedure program, which is
working from download to completion of programming/erasing, must be executed in a space
other than the flash memory to be programmed/erased (for example, on-chip RAM).
Since the result of download is returned to the programming/erasing interface parameters,
whether the normal download is executed or not can be confirmed.
Note that VBR can be changed after download is completed.
The operating frequency and user branch are set before execution of programming/erasing.
The user branch destination must be in an area other than the user MAT area which is in the
middle of programming and the area where the on-chip program is downloaded. These settings
are performed by using the programming/erasing interface parameters.
To program or erase, the FWE pin must be brought high and user program mode must be
entered.
The program data/programming destination address is specified in 256-byte units when
programming.
The block to be erased is specified in erase-block units when erasing.
These specifications are set by using the programming/erasing interface parameters and the on-
chip program is initiated. The on-chip program is executed by using the JSR or BSR
instruction to perform the subroutine call of the specified address in the on-chip RAM. The
execution result is returned to the programming/erasing interface parameters.
The area to be programmed must be erased in advance when programming flash memory.
Ensure that NMI, IRQ, and all other interrupts are not generated during programming or
erasing.
When the processing is not ended by the 256-byte programming or one-block erasure, the
program address/data and erase-block number must be updated and consecutive
programming/erasing is required.
Since the downloaded on-chip program is left in the on-chip RAM after the processing,
download and initialization are not required when the same processing is executed
consecutively.