R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 701

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R0K572115S000BE

Manufacturer Part Number
R0K572115S000BE
Description
KIT STARTER FOR SH7211
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
Microcontrollerr
Datasheets

Specifications of R0K572115S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7211
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
15.3.6
SCSCR operates the SCIF transmitter/receiver, enables/disables interrupt requests, and selects the
transmit/receive clock source. The CPU can always read and write to SCSCR. SCSCR is
initialized to H'0000 by a power-on reset.
Initial value:
Bit
15 to 8
7
R/W:
Bit:
Serial Control Register (SCSCR)
Bit Name
TIE
15
R
0
-
14
R
0
-
13
R
0
-
Initial
Value
All 0
0
12
R
0
-
11
R
0
-
R/W
R
R/W
10
R
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Transmit Interrupt Enable
Enables or disables the transmit-FIFO-data-empty
interrupt (TXI) requested when the serial transmit data
is transferred from the transmit FIFO data register
(SCFTDR) to the transmit shift register (SCTSR), when
the quantity of data in the transmit FIFO register
becomes less than the specified number of
transmission triggers, and when the TDFE flag in the
serial status register (SCFSR) is set to1.
0: Transmit-FIFO-data-empty interrupt request (TXI) is
1: Transmit-FIFO-data-empty interrupt request (TXI) is
Note: * The TXI interrupt request can be cleared by
R
9
0
disabled
enabled*
-
R
8
0
-
writing a greater quantity of transmit data than
the specified transmission trigger number to
SCFTDR and by clearing TDFE to 0 after
reading 1 from TDFE, or can be cleared by
clearing TIE to 0.
R/W
TIE
7
0
Rev. 3.00 Mar. 04, 2009 Page 675 of 1168
R/W
RIE
6
0
R/W
TE
5
0
R/W
RE
4
0
REIE
R/W
3
0
REJ09B0344-0300
R
2
0
-
R/W
1
0
CKE[1:0]
R/W
0
0

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