R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 121

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.6.4
When undefined code placed anywhere other than immediately after a delayed branch instruction
(i.e., in a delay slot) is decoded, general illegal instruction exception handling starts. The CPU
handles general illegal instructions in the same way as slot illegal instructions. Unlike processing
of slot illegal instructions, however, the program counter value stored is the start address of the
undefined code.
5.6.5
When an integer division instruction performs division by zero or the result of integer division
overflows, integer division instruction exception handling starts. The instructions that may become
the source of division-by-zero exception are DIVU and DIVS. The only source instruction of
overflow exception is DIVS, and overflow exception occurs only when the negative maximum
value is divided by −1. The CPU operates as follows:
1. The exception service routine start address which corresponds to the integer division
2. The status register (SR) is saved to the stack.
3. The program counter (PC) is saved to the stack. The PC value saved is the start address of the
4. After jumping to the address fetched from the exception handling vector table, program
instruction exception that occurred is fetched from the exception handling vector table.
integer division instruction at which the exception occurred.
execution starts. The jump that occurs is not a delayed branch.
General Illegal Instructions
Integer Division Instructions
Rev. 3.00 Mar. 04, 2009 Page 95 of 1168
REJ09B0344-0300