R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 343

• Manufacturer Part Number: R0K572115S000BE
• Description: KIT STARTER FOR SH7211
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: Microcontrollerr

Specifications of R0K572115S000BE

• Contents: CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
• For Use With/related Products: SH7211
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Note:
Bit
1
0
* Only 0 can be written to clear the flag after 1 is read.
Bit Name
TE
DE
Initial
Value
0
0
R/W
R/(W)* Transfer End Flag
R/W
Descriptions
This bit is set to 1 when DMATCR becomes 0 and
DMA transfer ends.
The TE bit is not set to 1 in the following cases.
•
•
To clear the TE bit, write 0 after reading TE = 1.
Even if the DE bit is set to 1 while this bit is set to 1,
transfer is not enabled.
0: During the DMA transfer or DMA transfer has been
[Clearing condition]
•
1: DMA transfer ends by the specified count
DMA Enable
Enables or disables the DMA transfer. In auto-request
mode, DMA transfer starts by setting the DE bit and
DME bit in DMAOR to 1. In this case, all of the bits
TE, NMIF in DMAOR, and AE must be 0. In an
external request or peripheral module request, DMA
transfer starts if DMA transfer request is generated by
the devices or peripheral modules after setting the
bits DE and DME to 1. In this case, however, all of the
bits TE, NMIF, and AE must be 0 as in the case of
auto-request mode. Clearing the DE bit to 0 can
terminate the DMA transfer.
0: DMA transfer disabled
1: DMA transfer enabled
terminated
(DMATCR = 0)
DMA transfer ends due to an NMI interrupt or
DMA address error before DMATCR becomes 0.
DMA transfer is ended by clearing the DE bit and
DME bit in DMA operation register (DMAOR).
Writing 0 after reading TE = 1
Rev. 3.00 Mar. 04, 2009 Page 317 of 1168
REJ09B0344-0300