R0K572115S000BE Renesas Electronics America, R0K572115S000BE Datasheet - Page 692

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R0K572115S000BE

Manufacturer Part Number
R0K572115S000BE
Description
KIT STARTER FOR SH7211
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
Microcontrollerr
Datasheets

Specifications of R0K572115S000BE

Contents
CPU Board, LCD Display Module, E8 Emulator, Cable, QuickStart Guide and CD-ROM
For Use With/related Products
SH7211
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
• Four types of interrupts: Transmit-FIFO-data-empty interrupt, break interrupt, receive-FIFO-
• When the SCIF is not in use, it can be stopped by halting the clock supplied to it, saving
• The quantity of data in the transmit and receive FIFO data registers and the number of receive
• A time-out error (DR) can be detected when receiving in asynchronous mode.
Figure 15.1 shows a block diagram of the SCIF.
TXD
SCK
Rev. 3.00 Mar. 04, 2009 Page 666 of 1168
REJ09B0344-0300
RXD
data-full interrupt, and receive-error interrupts are requested independently.
power.
errors of the receive data in the receive FIFO data register can be ascertained.
[Legend]
SCRSR:
SCFRDR:
SCTSR:
SCFTDR:
SCSMR:
SCSCR:
SCFRDR (16 stage)
SCRSR
Receive shift register
Receive FIFO data register
Transmit shift register
Transmit FIFO data register
Serial mode register
Serial control register
SCFTDR (16 stage)
Figure 15.1 Block Diagram of SCIF
Parity generation
SCTSR
Parity check
Module data bus
Transmission/reception
control
SCFSR:
SCBRR:
SCSPTR:
SCFCR:
SCFDR:
SCLSR:
SCSEMR:
SCSEMR
SCSPTR
SCSMR
SCSCR
SCFDR
SCFCR
SCFSR
SCLSR
Serial status register
Bit rate register
Serial port register
FIFO control register
FIFO data count register
Line status register
Serial extended mode register
Clock
External clock
Baud rate
generator
SCIF
SCBRR
Internal
data bus
Pφ/4
Pφ/16
Pφ/64
TXI
RXI
ERI
BRI

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