HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 140

• Manufacturer Part Number: HD64F7144F50V
• Description: IC SUPERH MCU FLASH 256K 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD64F7144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6. Interrupt Controller (INTC)
Rev.4.00 Mar. 27, 2008 Page 94 of 882
REJ09B0108-0400
Notes: I3 to I0 are Interrupt mask bits of status register (SR) in the CPU
Copy accept-interrupt
Branch to exception
execution state
Save SR to stack
Save PC to stack
IRQOUT = high
Read exception
IRQOUT = low
level to I3 to I0
service routine
Interrupt?
vector table
Program
1. IRQOUT is the same signal as interrupt request signal to the CPU (see figure 6.1).
2. When the accepted interrupt is sensed by edge, a high level is output from the IRQOUT pin at the moment when
the IRQ status register (ISR). Interrupts held pending due to edge detection are cleared
by a power-on reset or a manual reset.
NMI?
Yes
Therefore, IRQOUT is output when the request priority level is higher than the level in bits I3–I0 of SR.
the CPU starts interrupt exception processing instead of instruction execution (namely, before saving SR to stack).
However, if the interrupt controller accepts an interrupt with a higher priority than the interrupt just to be accepted
and has output an interrupt request to the CPU, the IRQOUT pin holds low level.
Yes
No
No
User break?
*1
*2
Yes
Figure 6.3 Interrupt Sequence Flowchart
No
interrupt?
H-UDI
Yes
Yes
No
interrupt?
level 14?
Level 15
I3 to I0 ≤
No
Yes
Yes
No
interrupt?
level 13?
Level 14
I3 to I0 ≤
No
Yes
Yes
No
interrupt?
I3 to I0 =
level 0?
Level 1
No
Yes
No