HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 784
![IC SUPERH MCU FLASH 256K 112QFP](/photos/12/21/122194/hd64f7144f50v_sml.jpg)
HD64F7144F50V
Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Specifications of HD64F7144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS
Quantity:
450
Company:
Part Number:
HD64F7144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F7144F50V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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25. List of Registers
Rev.4.00 Mar. 27, 2008 Page 738 of 882
REJ09B0108-0400
Register name
⎯
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
Interrupt priority register D
Interrupt priority register E
Interrupt priority register F
Interrupt priority register G
Interrupt priority register H
Interrupt control register1
IRQ status register
Interrupt priority register I
Interrupt priority register J
⎯
Interrupt control register 2
⎯
Port A data register H
Port A data register L
Port A I/O register H
Port A I/O register L
Port A control register H
⎯
Port A control register L1
Port A control register L2
Port B data register
Port C data register
Port B I/O register
Port C I/O register
Port B control register 1
Port B control register 2
Port C control register 2
abbreviation
⎯
IPRA
IPRB
IPRC
IPRD
IPRE
IPRF
IPRG
IPRH
ICR1
ISR
IPRI
IPRJ
⎯
ICR2
⎯
PADRH
PADRL
PAIORH
PAIORL
PACRH
⎯
PACRL1
PACRL2
PBDR
PCDR
PBIOR
PCIOR
PBCR1
PBCR2
PCCR
NO. of bits Address
⎯
16
16
16
16
16
16
16
16
16
16
16
16
⎯
16
⎯
16
16
16
16
16
⎯
16
16
16
16
16
16
16
16
16
H'FFFF8340 to
H'FFFF8347
H'FFFF8348
H'FFFF834A
H'FFFF834C
H'FFFF834E
H'FFFF8350
H'FFFF8352
H'FFFF8354
H'FFFF8356
H'FFFF8358
H'FFFF835A
H'FFFF835C
H'FFFF835E
H'FFFF8360 to
H'FFFF8365
H'FFFF8366
H'FFFF8368 to
H'FFFF837F
H'FFFF8380
H'FFFF8382
H'FFFF8384
H'FFFF8386
H'FFFF8388
H’FFFF838A
H’FFFF838C
H’FFFF838E
H’FFFF8390
H’FFFF8392
H'FFFF8394
H'FFFF8396
H'FFFF8398
H'FFFF839A
H'FFFF839C
Module
INTC
I/O
PFC
I/O
PFC
Access size
⎯
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
⎯
8, 16
⎯
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
⎯
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
8, 16
8, 16, 32
NO. of Access states
φ reference
B:2
W:2
L:4
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