HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 454

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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6
13. Serial Communication Interface (SCI)
Rev.4.00 Mar. 27, 2008 Page 408 of 882
REJ09B0108-0400
Bit
6
5
Bit Name
RDRF
ORER
Initial Value
0
0
R/W
R/(W)* Receive Data Register Full
R/(W)* Overrun Error
Description
Indicates that the received data is stored in RDR.
[Setting condition]
[Clearing conditions]
RDR and the RDRF flag are not affected and retain
their previous states even if the RE bit in SCR is
cleared to 0. If reception of the next data is
completed while the RDRF flag is still set to 1, an
overrun error will occur and the receive data will be
lost.
Indicates that an overrun error occurred during
reception, causing abnormal termination.
[Setting condition]
The receive data prior to the overrun error is retained
in RDR, and the data received subsequently is lost.
Also, subsequent serial reception cannot be
continued while the ORER flag is set to 1. In clocked
synchronous mode, serial transmission cannot be
continued either.
[Clearing conditions]
The ORER flag is not affected and retains its
previous value when the RE bit in SCR is cleared to
0.
When serial reception ends normally and receive
data is transferred from RSR to RDR
Power-on reset or software standby mode
When 0 is written to RDRF after reading RDRF =
1
When the DMAC is activated by a RXI interrupt
request.
When the DTC is activated by an RXI interrupt
and transferred data from RDR while the DISEL
bit in DTMR of DTC is 0.
When the next serial reception is completed while
RDRF = 1
Power-on reset or software standby mode
When 0 is written to ORER after reading ORER =
1

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