HD64F7144F50V Renesas Electronics America, HD64F7144F50V Datasheet - Page 430

IC SUPERH MCU FLASH 256K 112QFP

HD64F7144F50V

Manufacturer Part Number
HD64F7144F50V
Description
IC SUPERH MCU FLASH 256K 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheets

Specifications of HD64F7144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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12. Watchdog Timer
12.3.3
RSTCSR is an 8-bit readable/writable register that controls the generation of the internal reset
signal when TCNT overflows, and selects the type of internal reset signal.
Note:
Rev.4.00 Mar. 27, 2008 Page 384 of 882
REJ09B0108-0400
Bit
7
6
5
4 to 0 —
Bit Name
WOVF
RSTE
RSTS
*
Reset Control/Status Register (RSTCSR)
Only 0 can be written for flag clearing.
0
0
All 1
Initial Value
0
R/W
R/(W)*
R/W
R/W
R
Description
Watchdog Timer Overflow Flag
This bit is set when TCNT overflows in watchdog
timer mode. This bit cannot be set in interval timer
mode.
[Setting condition]
[Clearing condition]
Reset Enable
Specifies whether or not an internal reset signal is
generated in the chip if TCNT overflows in watchdog
timer mode.
0: Internal reset signal is not generated even if
1: Internal reset signal is generated if TCNT
Reset Select
Selects the type of internal reset generated if TCNT
overflows in watchdog timer mode.
0: Power-on reset
1: Manual reset
Reserved
These bits are always read as 1. The write value
should always be 1.
TCNT overflows
(Though this LSI is not reset, TCNT and TCSR in
WDT are reset)
overflows
Set when TCNT overflows in watchdog timer
mode
Cleared by reading WOVF, and then writing 0 to
WOVF

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